S5P4418 SSP/SPI problem

Henry
Hi all,

I'm writing a standalone C program using S5P4418 SSP/SPI however after
writing data to Tx FIFO buffer the status register always indicates SSP bus
busy ans it is stuck at there.

The S5P4418 user manual doesn't show details regarding to setting up SSP
but I followed of below steps

1> Choose SSP clock source (PLL2) and enable clk gen.
2> Reset SSP IP
3> Setup SCR0 register (SPI clock rate, mode, dada size)

To send a byte :

1> Disable SSP (SCR1 = 0)
2> Write Tx FIFO buffer (DDR = byte)
3> Enable SSP to shift Tx FIFO data out of the SSP bus

However the status register indicates SSP bus is busy and it is stuck at
here.
I don't know where is the root cause, everyone who have experience with it
please show me some hints.

Thank you very much.

davef
No experience with SSP, but after step 1> does the status register
indicates that the SSP bus is NOT busy?

Henry
Hello Davef,

Thanks so much for your reply.

After step 1> the status register indicated SSP bus is not busy. If I write
Tx FIFO buffer once time or several times (under the limit of Tx FIFO size)
the status register indicates SSP but busy after that.

However, if I write Tx FIFO many times (to make Tx FIFO full) then the
status register indicates Tx FIFO full and SSP bus busy flag is cleared.
It's really strange.

Henry
Here is my simple program :

SSP0CLKGEN0L = 0xE8; // Chose PLL2  
SSP0CLKENB   = 0x4;  // Enable SSP0 clock gen

/* Reset SSP0 IP */
IP_RESET_REGISTER_1 &= ~(1 << 12); // Reset core
IP_RESET_REGISTER_1 |=  (1 << 12); // No reset core

IP_RESET_REGISTER_1 &= ~(1 << 11); // Reset APB
IP_RESET_REGISTER_1 |=  (1 << 11); // No reset APB

/* Setup SSP control registers */
SSP0->SSPCR1 = 0;     // Disable SSP 
SSP0->SSPCR0 = 0x2C7; // Motorola protocol, 8bit size... 
SSP0->SSPDMACR = 0x0; // Don't use DMA

Test transfer a byte as below:

// Write 0xAA to Tx FIFO
SSP0->SSPDR = 0xAA;

/* Enable SSP */
SSP0->SSPCR1 |= (1 << 1);

/* Wait for SSP not busy */
while(SSP0->SSPSR & 0x10);

printf("Pass1\r\n");

/* Wait until TX FIFO is empty */
while (!(SSP0->SSPSR & 0x01));

printf("Pass2\r\n");

/* Wait until RX FIFO is not empty */
while(!(SSP0->SSPSR & 0x04));

printf("Pass3\r\n");

/* Read RX FIFO */
*rxdata = SSP0->SSPDR;

/* Disable SPI */
SSP0->SSPCR1 &= ~(1 << 1);

Pass1 never printed out, the SSP bus is busy forever.
I've referenced the u-boot source code and followed it's steps, but SSP is
till busy.

davef
Minor point;
SSP0CLKENB   = 0x4;  // Enable SSP0 clock gen

Should that be 0x04?

Are you using master or slave mode?  If you are using master mode I don't
understand why you would have to wait for the RX FIFO to be empty.

Perhaps it is just empty anyway.

Henry
Hello Davef,

> SSP0CLKENB   = 0x4;  // Enable SSP0 clock gen
> Should that be 0x04?

They are the same (0x04 = 0x4) 

I'm using master mode

/* Wait until RX FIFO is not empty */
while(!(SSP0->SSPSR & 0x04));

=> Program waits for the incoming data so Rx FIFO = not empty after that.

Henry
Oh I can make it work as below change :


IP_RESET_REGISTER_1 &= ~(1 << 12); // Reset core
IP_RESET_REGISTER_1 |=  (1 << 12); // No reset core
IP_RESET_REGISTER_1 &= ~(1 << 11); // Reset APB
IP_RESET_REGISTER_1 |=  (1 << 11); // No reset APB

To

IP_RESET_REGISTER_1 &= ~(1 << 12); // Reset core
IP_RESET_REGISTER_1 &= ~(1 << 13); // Reset APB
IP_RESET_REGISTER_1 |=  (1 << 12); // No reset core
IP_RESET_REGISTER_1 |=  (1 << 13); // No reset APB

But I don't know why, in the datasheet it shows IP_RESET_REGISTER_1 as
below position 

SSP0_PRESETn -> bit 11
SSP0_nSSPRST -> bit 12

and

SSP1_PRESETn -> bit 13

I'm only using SSP0, no concerned with SSP1 ??? Some things are wrong here.

davef
Sorry, I have run out of ideas.

Good luck!

Anatoly
Hello Henry,

Sorry bothering you but maybe you'll say in brief how to launch a
standalone program on S5P4418? I have NanoPC-T1 with S5P4412 and didn't
find options to launch binary code on it...
Thanks in advance.

Henry
Hello,

You can download the source code as below link:

https://drive.google.com/file/d/0B3jP4TshbM3VdUMxTWktdDZueGs/view?usp=sh...

Some information about environment setting:

1> Download IDE https://www.embitz.org/, the embizt project file is in the
source code also.

2> Flash u-boot into the micro SD card, I created this project for my
custom S5P4418 board, but this might work on NanoPi board also.

3> To launch the program, use u-boot load jf4418.bin into DDRAM at address
0x48000000, the run command go to start the program.

Anny problem please let me know.

Henry
Hello,

Now I'm facing a new problem about the TIMER

In the datasheet it shows the clock gen setting:

5.1.2.2.5 PWMTIMERCLKENB

and

5.1.2.2.6 PWMTIMERCLKGEN0L

Follow this we can select clock source for TIMER module including PLL0,
PLL1, PLL2 and CLKDIV0 accordingly.

However, at the TIMER description chapter 19.4 they've only mentioned PCLK
and I've tested just only PCLK effected to the TIMERs. S5P4418 datasheet
seems to be not good and there are much incorrect information in there.

Anatoly
Hello Henry,

Thanks for all!
I'll give it a try (consider even purchasing a S5P4418 board if S5P4412
will not fit).

P.S. I like bare metal, S3C2440, S5PV210 and now program Vphone S8
(smallest in the World) w/ Mediatek's MT2502 SoC using C language - very
nice solution for IoT, also LinkIt One and Assist modules.

Henry
Hello Anatoly,

This source code is suite for S5P4418 only, you can try with nanoPi2 as
well.
Now I'm porting IoT RTOS on S54418 platform. I've provide github source
code when done.

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