We have a product with an mini2440 based board and deliver since 2 years
with kernel 2.6.29. Our changes to the hardware are reflected in patches
against the 2.6-kernel (only a few things). Now we decided to test
buildroot. Everything works fine with the generated root and the old kernel
(packed in as tar + patches + config) but the kernel makes some trouble:
a) Baudrate at debug port ttySAC0 is 38400 instead of 115200
so uboot=115200 -> kernel 38400 -> login 115400.
b) The display (type1=7") shows up as 800x480 in fbset but
shows only stripes. The programs dont fail (/dev/fb0 working)
but no output (blinking stripes)
We tested patchsets from different sources (pengutronix) but in the end we
have no working solution. So my question: Is there a working
patchset+kernel-config for Kernel 3.4?
Switching from linux 2.6.29 to 3.4.3
a) should be soved with a correct kernel command line b) should be solved with a correct timing adaption in the platform file a) did you forward a kernel command line which contains "console=ttySAC0,115200" to setup the baudrate to your requirements? b) Did you compare the timing settings for your 7" display from your existing and *working* 2.6.29 and the ones in my 3.4 kernel (in the git repository) in our Pengutronix board support package?
Thanks,
a) we use a modified u-boot that boots our kernel from /uImage in ext2 on
sd-card and generates also hwaddr in cmdline. We will change there.
b) The timing is a little bit different:
2.9.29:
#define LCD_WIDTH 800
#define LCD_HEIGHT 480
#define LCD_PIXCLOCK 40000
#define LCD_RIGHT_MARGIN 67
#define LCD_LEFT_MARGIN 40
#define LCD_HSYNC_LEN 31
#define LCD_UPPER_MARGIN 25
#define LCD_LOWER_MARGIN 5
#define LCD_VSYNC_LEN 1
3.4.3:
_LCD_DECLARE(
10, /* the 7" runs slower */
800, 40, 40, 48, /* x timing */
480, 29, 3, 3, /* y timing */
50), /* refresh rate */
.lcdcon5 = (S3C2410_LCDCON5_FRM565 |
S3C2410_LCDCON5_INVVLINE |
S3C2410_LCDCON5_INVVFRAME |
S3C2410_LCDCON5_PWREN),
}
this is a bit different
3.4.4: 800 40 40 48 480 29 3 3
2.6.29: 800 67 40 31 480 25 5 1
clock: old 40 Mhz
new: 50 *(480+29+3)*(800+40+40) = 22.528 Mhz
is this a problem?
According to the datasheet (http://www.friendlyarm.net/dl.php?file=AT070TN83.pdf) the clock speed should be typical at 33 MHz (up to 50 MHz). According to the calculation method in the kernel sources the clock speed results into: (10*100000000000LL) / ((50) * (800 + 40 + 40 + 48) * (480 + 29 + 3 + 3)) = 41,8 MHz
Thats OK - what i missed was the unit (picoseconds) for the clock. Further investigation showed up: Whenever i use fbset and change something (like pixclock, vslen...) nothing changes in the timing but the display works then. I also get an output with some register values (always the same) when i change - but not initially. That means some initialization is missing in the init-code i think.
Peter, please visit our Mini2440 BSP website, there is now a patch available to make the LCD work again. Also your display should work now with a 3.4 kernel and the patch stack from our Mini2440 BSP.


